| 세션명 | 분자전자 부문위원회 (II) |
|---|---|
| 발표장 | 제1회장 |
| 논문코드 | 2L1-1 |
| 발표일 | 2021-10-22 |
| 발표시간 | 10:30-10:55 |
| 논문제목 | Vertically Stacked Graphene–Semiconductor Heterostructures for Large-Area Electronics |
| 발표자 | 조정호 |
| 발표자 소속 | 연세대학교 |
| 저자 | 조정호† |
| 소속 | 연세대학교 |
| 논문초록 | We demonstrate a new device architecture for flexible vertical Schottky barrier (SB) transistors based on graphene–semiconductor–metal heterostructures and ion gel gate dielectrics. The vertical SB transistor structure was formed by (i) vertically sandwiching a semiconductor layer between graphene and metal electrodes and (ii) employing a separate coplanar gate electrode bridged with the vertical channel through an ion gel. The high intrinsic capacitance of the ion-gel gate dielectric facilitated modulation of the SB height at the graphene/channel heterojunction at a gate voltage lower than 2 V. The resulting vertical SB transistors exhibited a high current density, a high on−off current ratio, and excellent operational and environmental stabilities. The facile, large-area, and room-temperature deposition of both semiconductors and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene-based future electronics. |
THE POLYMER SOCIETY OF KOREA